TLDRs;
- Samsung is investing over $22B in a new Pyeongtaek memory line aimed at soaring AI chip demand by 2028.
- The P5 facility will focus on HBM4, DRAM, and NAND as global AI workloads strain memory supply.
- Suppliers are preparing for major Samsung procurement waves between 2026 and 2027 ahead of tool installs.
- AI chip revenue could reach $133B by 2028, making P5 a critical expansion of Samsung’s memory capacity.
Samsung Electronics has unveiled a sweeping new investment plan that will pour more than $22 billion into a next-generation memory chip production line at its massive Pyeongtaek campus in South Korea.
The expansion, one of Samsung’s most significant memory-focused moves in years, is designed to capitalize on a projected peak in global AI chip demand by 2028, as generative AI workloads, hyperscale data centers, and custom accelerators continue to reshape the semiconductor landscape.
The company confirmed that mass production at the new line, known internally as P5, is scheduled to begin in 2028. This aligns with earlier signals that Samsung is preparing for a multi-year surge in demand for HBM (high-bandwidth memory), DRAM, and NAND flash, all crucial to training and deploying large-scale AI systems.
The announcement follows reporting that Samsung will also add new construction and infrastructure capacity to support the buildout, reinforcing South Korea’s role as a global powerhouse for next-generation semiconductor manufacturing.
Pyeongtaek Build Targets Advanced Memory
P5’s development comes after a pause in 2024, but Samsung is now accelerating the line toward full production capability by 2028. The facility is expected to manufacture a mix of DRAM, NAND, and foundry products for external clients, though insiders emphasize that the investment heavily centers on memory rather than cutting-edge logic nodes.
Among the most anticipated technologies slated for the new line is HBM4/4E, the next evolution of high-bandwidth memory designed to serve power-hungry AI accelerators. Samsung is simultaneously converting its existing P4 line to HBM4 output in 2026, with capacity expected to reach 60,000 wafers per month, a figure that positions the company to capture a sizable share of the tightening HBM supply chain.
This focus on memory over logic is partly driven by delays in Samsung’s 1.4nm pilot program, originally expected earlier but now pushed to late 2025 or early 2026. Mass output of those advanced nodes is unlikely before 2028, making P5 far more critical to meeting near-term AI workloads.
A Market Racing Toward a 2028 Peak
According to industry forecasts, AI chip revenue is on track to hit $133 billion by 2028, reflecting unprecedented adoption across industries.
Meanwhile, supply of high-bandwidth memory is expected to remain tight through 2027, setting up a period where only a few manufacturers, Samsung among them, will have room to expand.
This dynamic explains Samsung’s accelerated timeline and the heavy emphasis on scale rather than experimentation. P5 represents a foundational bet that AI workloads will not only continue to rise but will increasingly depend on more powerful memory architectures.
Massive Supplier Pipeline Expected Beginning 2026
As construction progresses, Samsung has already moved upstream to secure critical contracts for the Pyeongtaek build.
The company recently raised a plant contract to $3 billion, while its engineering and architecture arm, Samsung E&A, secured a â‚©910 billion project tied to new campus expansion.
These deals signal the start of the Engineering, Procurement, and Construction (EPC) window, typically 12 to 18 months before tool installation begins. Analysts expect heavy equipment to arrive at P5 as early as October 2025, with the bulk of EUV lithography, TSV packaging tools, and other memory-specific machinery ordered throughout 2026.
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