TLDR
- Synopsys gains as Multiphysics Fusion targets advanced AI chip design tools.
- New Synopsys tools aim to speed chip closure and signoff workflows for AI chips.
- Multiphysics Fusion blends Synopsys EDA with Ansys signoff for advanced chips.
- SNPS rises after rollout targets AI, multi-die, and photonic chip designs today.
- Partners validate Synopsys tools for faster advanced chip development cycles.
Synopsys moved higher after launching Multiphysics Fusion solutions for advanced semiconductor design. SNPS closed at $461.74, up 2.98%, then reached $470.00 after hours, up 1.79%. The rollout targets complex AI chips, multi-die systems, and high-performance computing designs.
Synopsys Expands Chip Design Tools
Synopsys introduced its first Multiphysics Fusion solutions for customer deployment. The company designed the portfolio to address growing physics challenges in advanced chips. These challenges include signal integrity, power integrity, thermal effects, electromagnetic issues, and co-packaged optics.
The new portfolio combines Synopsys electronic design automation tools with Ansys signoff analysis. As a result, engineering teams can assess physics effects earlier in chip development. The approach supports digital, analog, photonic, and multi-die design workflows.
Synopsys said the solutions aim to reduce overdesign and improve design predictability. The company also expects fewer workflow iterations and faster convergence. This context matters as chipmakers push smaller nodes and more complex packaging.
Multiphysics Fusion Targets Faster Design Closure
The first rollout includes solutions for timing signoff, design closure, multi-die systems, and analog design. Synopsys built these flows with GPU acceleration and NVIDIA CUDA-X libraries. The company also uses cuDSS to support demanding simulation workloads.
The timing signoff solution links PrimeTime with RedHawk-SC, RedHawk-SC Electrothermal, StarRC, and HFSS-IC. This setup allows teams to include IR, thermal, and stress effects in timing analysis. Synopsys said the flow can deliver up to three times faster runtimes.
The design closure solution combines PrimeClosure with RedHawk-SC for power integrity optimization. It targets fewer engineering change orders and better power, performance, and area results. Synopsys said this flow can support up to ten times faster design closure.
Industry Partners Validate Early Deployment
Synopsys cited early work with MediaTek, NVIDIA, Samsung Electronics, and Cisco Silicon One. These companies use the technology across multi-die systems, timing signoff, and power integrity workflows. Their involvement gives the rollout direct relevance across major semiconductor design areas.
MediaTek uses the platform to improve decisions in high-performance compute systems. NVIDIA supports acceleration for SPICE simulations, electromagnetics, and power-integrity workloads. Samsung uses the technology to connect timing analysis with IR drop, thermal, and stress data.
Cisco Silicon One uses the tools to bring IR drop effects into signoff design closure. The process gives teams earlier visibility into real operating conditions. Synopsys said the full portfolio remains available now for customer deployment.
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